Design 2:1, 4:1 and 8:1 multiplexers by referring the theory section. Save these circuits separately so that they can be imported and used for designing other things.

Import two 4:1 multiplexers designed in 1st part and implement a Half adder circuit using these multiplexers. One mux will generate SUM (A ex-or B) and another mux will generate Carry (A.B). Now Implement the same using two 2:1 multiplexers. (Hint: choose any one out of A and B as the select bit for multiplexers).

Import two 4:1 multiplexers designed in 1st question and design a 8:1 mux using them. You can use additional hardware to choose between the outputs of the two multiplexers. (Hint: Use 1 of the three select bits s2s1s0 as enable input for one of the 4:1 mux and its compliment for the other mux).